This made it more difficult to build high frequency superscalar implementations. The connections for each port is an additional capacitive load that must be driven by register memory cell. This required the single register file to have sufficient read and write ports to support both the integer execution unit and the floating-point unit. It had a small but powerful command set, and, like all Motorola CPUs, did not use memory segmentation.Ī major architectural mistake was that both integer instructions and floating-point instructions used the same register file. It was a pure 32-bit load/store architecture, using separate instruction and data caches ( Harvard architecture), and separate data and address buses. Like the 68000 before it, the 88000 was considered to be a very "clean" design. At that point the 88000 was dumped as soon as possible.
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Motorola p2k pinout upgrade#
They worked a few features of the 88000 into the new PowerPC design to offer their customer base some sort of upgrade path. In the early 1990s Motorola joined the AIM effort to create a new RISC design based on the IBM POWER design. It appears to have failed in any practical sense. There was an attempt to popularize the system with the 88open group, similar to what Sun Microsystems was attempting with their SPARC design. In the late 1980s several companies were actively watching the 88000 series for future use, including NeXT, Apple Computer and Apollo Computer, but all gave up by the time the 88110 was available in 1990. A follow-on version combining the CPU and MMU was planned. This initial version generally required a separate MMU, and saw little use. Originally called the 78000 as a homage to their famed 68000 series, the design went through a tortured development path, including the name change, before finally emerging in April 1988.